Acromag

Acromag

30765 S Wixom Rd, Wixom, Michigan, 48393, United States

AcPC8625A Nonintelligent 6U cPCI IP Carrier

AcPC8625A Nonintelligent 6U cPCI IP Carrier

AcPC8625A: Nonintelligent 6U cPCI IP Carrier

Product short description:

  • Four IP module slots
  • Rear access I/O
  • Plug-and-play carrier configuration and interrupt support

The AcPC8625A is a nonintelligent slave board that interfaces four IP modules to the CompactPCI (cPCI) bus.

Description

AcPC8625A: Nonintelligent 6U cPCI IP Carrier Description

The AcPC8625A is a nonintelligent board that interfaces four IP modules to the CompactPCI (cPCI) bus.

All 200 I/O points are brought out the rear J4 and J5 connectors. This convenience eliminates messy cables from hanging out the front of the cage. In addition to a more efficient cage wiring design, it is also much easier to insert and replace boards.

And with Acromag’s 80mm transition module (TRANS-C200), all 200 I/O points are easily ported out the back of the cage.

AcPC8625A: Nonintelligent 6U cPCI IP Carrier Performance Specifications

General

Acromag’s carrier boards provide full data access to the IP module’s I/O, ID, interrupt spaces, and memory. With full access to the programmable registers, you can easily configure and control the operation of the IP modules from the CompactPCI bus.

Up to two interrupt requests are supported for each IP module. All board interrupts are mapped to PCI bus INTA# signal.

Individual passive filters on each IP power supply line provide optimum filtering and noise isolation between the IP modules and the carrier board.

IP Compliance (ANSI/VITA 4): Meets IP specs per ANSI/VITA 4-1995 (8MHz and 32MHz) and IP I/O mapping to PICMG 2.4 R1.0.

Electrical/mechanical interface: Supports single or double size IP modules. 32-bit IP modules are not supported.

IP Module I/O space, ID space, INT space, and MEM space supported.

Interrupts: Supports two interrupt requests per IP module and interrupt acknowledge cycles via access to IP INT space.

CompactPCI bus Compliance

Meets PCI spec. V2.1 and PICMG 2.0, R2.1.

Data transfer bus: Slave with 32-bit, 16-bit, and 8-bit data transfer operation 32-bit read/write accesses are implemented as two 16-bit transfers to the IPs.

Interrupts: CompactPCI bus INTA# interrupt signal. Up to two requests sourced from each IP mapped to INTA#. Interrupt vectors come from IP modules via access to IP module INT space.

Plug-and-Play: The system maps the base address into the PCI bus 32-bit memory space.

Power Requirements

Power3.3V (±5%): 300mA maximum.5V (±5%): 30mA maximum.±12V (±5%): 0mA (not used).Plus IP module load.

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